Look-up Tables (LUTs) for Multiple-Valued, Combinational Logic
نویسندگان
چکیده
The use of Look-Up Tables (LUTs) is extended from binary to multiple-valued logic (MVL) circuits. A multiple-valued LUT can be implemented using both current-mode and voltage-mode techniques, reducing the transistor count to half compared to that of a binary implementation. Two main applications for multiple-valued LUTs are multiple-valued FPGAs and intelligent memories. An FPGA uses a LUT as a generic logic block to provide programmability. In an intelligent memory, a multiple-valued LUT is added in the Y-decoder section to facilitate simple mathematical operations on the stored digits. An FFT operation is used as an example in this paper to illustrate how a multiple-valued LUT can be beneficial.
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